The Intel 8085 remains a standard teaching vehicle for computer organization because of its small, accumulator-centric instruction set. Although the device is an 8-bit processor, its instruction set includes 16-bit arithmetic, most notably the DAD instruction, which adds a register pair to HL without naming the accumulator and without disturbing four of the five documented condition flags. This asymmetry is a recurring source of conceptual difficulty: learners who have internalised the rule that “every ALU operation passes through the accumulator” cannot reconcile it with the existence of DAD, and they routinely predict incorrect flag and Program Status Word (PSW) states in examinations and in laboratory work. This tutorial paper resolves the apparent contradiction by separating three distinct arithmetic resources inside the 8085: the accumulator-centric 8-bit data path, the hidden temporary registers (ACT and TMP) that allow the same 8-bit ALU to be driven from a register pair while bypassing the accumulator, and the 16-bit incrementer/decrementer attached to the address latch that serves INX, DCX and program counter updates. We show, using the published instruction timing of DAD (one byte, three machine cycles, ten T-states, of which six are bus-idle), that DAD is executed as two successive 8-bit ALU passes with internal carry propagation rather than by a dedicated 16-bit adder, and we correct a widespread textbook simplification to that effect. The flag and PSW consequences are then derived rather than asserted, and are verified against a worked simulator run. A quantitative comparison shows that the DAD form of a 16-bit addition requires 1 byte and 10 T-states against 6 bytes and 24 T-states for the equivalent MOV/ADD/ADC sequence, while additionally preserving the accumulator and four condition flags. The paper concludes with a misconception-to-remedy table, measurable learning outcomes and ready-to-use assessment items, so that the material can be adopted directly in undergraduate microprocessor courses.

Shruti Chouhan, Giriraj Kumar Prajapati, Neha Khare, "Arithmetic Without the Accumulator: A Tutorial Analysis of 16-Bit Addition, ALU Data Paths, and PSW Behaviour in the Intel 8085 Microprocessor" International Journal of Scientific Research and Engineering Development, V9(5): Page(283-298) September - October 2026. ISSN: 2581-7175. www.ijsred.com. Published by Scientific and Academic Research Publishing.