International Journal of Scientific Research and Engineering Development

Real-time edge detection is a fundamental requirement in embedded vision applications such as robotics, industrial inspection, surveillance, and autonomous systems Traditional software-based Sobel edge detection methods are limited by sequential execution, leading to increased processing latency. To address this issue, this work presents a hardware-accelerated Sobel edge detection system implemented on a Xilinx Zynq System-on-Chip (SoC). The design leverages FPGA parallelism for high-speed, low-latency image processing, while the ARM processor handles control and memory operations. Bitmap images stored in DDR memory are transferred to the programmable logic using AXI DMA. A fully pipelined Verilog-based accelerator performs Sobel convolution, gradient magnitude calculation, and thresholding, enabling continuous pixel processing at one pixel per clock cycle. Experimental results obtained through simulation and hardware validation using Vivado 2018.2 demonstrate significant performance improvement over CPUbased execution, producing accurate real-time edge outputs. Although extended operation results in increased device temperature, requiring thermal optimization, the proposed system remains efficient, scalable, and suitable for real-time embedded image-processing applications.

A Arathi, Chandana ML, Bhumika YH, Ganavi K, Swati Kumari Roy, "Edge Detection and Image Smoothing Using Sobel Filtering on a Zynq SoC Platform " International Journal of Scientific Research and Engineering Development, V8(6): Page(3063-3070) Nov-Dec 2025. ISSN: 2581-7175. www.ijsred.com. Published by Scientific and Academic Research Publishing.